1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a sectional shape of metal wiring or via contact in multilayer wiring using an interlayer insulating film containing carbon and a method of forming the same, being used, for example, in a semiconductor integrated circuit having metal wiring or via contact using copper (Cu) or Cu alloy.
2. Description of the Related Art
Recently, in the trend of higher speed of LSI, a film of low dielectric constant comes to be used as interlayer dielectric (ILD) of multilayer wiring. The relative dielectric constant of a conventional SiO2 film is about 4.0, the relative dielectric constant of a SiO2 film containing fluorine is about 3.4 to 3.9, and an insulating film of lower relative dielectric constant of 3 or less is also recently used.
Generally, however, materials of low dielectric constant are weak in mechanical strength. Besides, carbon is often contained in the film in order to lower the dielectric constant. In such a case, the added carbon or CH3 (methyl group) may be damaged to lower the carbon concentration by a dry process such as resist ashing or reactive ion etching (RIE).
To prevent mechanical damage by chemical mechanical polishing (CMP) or damage by dry process, it has been attempted to form an interlayer insulating film by laminating insulating films of different carbon concentrations. The interlayer insulating film of this structure is effective against mechanical or chemical damage from above the film, however, the side surface of the wiring groove or via hole is lower in effectiveness because the film of low dielectric constant is exposed.
Problems of the interlayer insulating film of this structure are summarized below.
FIGS. 10A and 10B are sectional views of a semiconductor device in steps of a conventional method of manufacturing a semiconductor device, particularly showing the section of the semiconductor device in steps of forming via holes (or wiring grooves) in a multilayer wiring section.
As shown in FIG. 10A, a lower layer wiring 102 is buried in an insulating film 101 on a semiconductor substrate 100, and an interlayer insulating film 103 is deposited on the lower layer wiring 102 and insulating film 101. The interlayer insulating film 103 has a laminated structure composed of a first insulating film 104 formed of a silicon oxide film (hereinafter, referred to as Si oxide film) containing carbon, such as methyl siloxane, SiOCH, or SiOC, and a second insulating film (for example, SiO2, or SiOCH, low in carbon concentration) 105 of low carbon concentration as a cap film laminated on the first insulating film 104.
When via holes (or wiring grooves) 107 are formed in the interlayer insulating film 103 of such structure, on the side surface of the first insulating film 104 defining the via holes, the concentration of the contained carbon is lowered, and a damaged layer 106 of lowered carbon concentration is formed in the manufacturing process such as RIE or resist ashing (peeling off).
Since the damaged layer 106 has a property close to that of SiO2, in a wet etching process, which is described later, using chemical solution such as HF or NHF3, it is likely to be dissolved and lost as shown in FIG. 10B, or contracted in a subsequent heating process. As a result, the opening size of the via holes in the second insulating film 105 is smaller than that in the first insulating film 104, and protruding marks of opening edges of the second insulating film 105 are left over in the openings of the first insulating film 104.
FIGS. 11A and 11B are sectional views of a semiconductor device in steps of another conventional method of manufacturing the semiconductor device, particularly showing the section of the semiconductor device in steps of forming via holes (or wiring grooves) in a multilayer wiring section.
As shown in FIG. 11A, the second insulating film 105 is formed by a plasma process on the first insulating film 104 functioning as a cap film. In this case, a damaged layer 106 is formed on the top of the first insulating film 104. When a via hole (or wiring groove) 107 is formed in the interlayer insulating film 103, the damaged layer 106 is formed on the side surface of the first insulating film 104 for defining the via holes in the manufacturing process such as RIE or resist ashing. The damaged layer 106 are also likely to be dissolved and lost in a wet etching process, which is performed later, using chemical solution such as HF or NHF3 as shown in FIG. 11B. As a result, as in the afore-mentioned example, protruding marks of opening edges of the second insulating film 105 are left over in the openings of the first insulating film 104.
The protruding marks of opening edges of the second insulating film 105 left over in the openings of the first insulating film 104 as shown in FIG. 10B and FIG. 11B may cause to form thin portions or disconnections in a barrier metal film formed when a wiring or via is formed in a subsequent step or an insufficient embedding of metal wiring material (Cu or Cu alloy). These are not preferable from the viewpoint of reliability of wiring. Also, at the time of heat treatment, the metal wiring may break out from the thin portion of the barrier metal film, which may lower the electromigration resistance or stress migration resistance of buried wiring or via portions.
It has been attempted to decrease such protruding marks as much as possible to optimizing the etching process, ashing process, cleaning process, and the like, however, ultimately protrusions are formed more or less. Such phenomenon of protrusion is disclosed by K. Higashi et al. in “A Manufacturable Copper/Low-k SiO/SiCN Process Technology for 90 nm-node High Performance eDRAM,” 2002 proceedings of IEEE IITC, pp. 15–17.
As mentioned above, in the conventional multilayer wiring structure of the semiconductor device, when the buried wiring or via contact is formed in the wiring grooves or via holes formed in the interlayer insulating film having a first insulating film composed of a Si oxide film containing carbon and a second insulating film of lower carbon concentration (containing no carbon) formed on the first insulating film, thin portions or disconnections are formed in the barrier metal, or the metal wiring material may be insufficiently embedded.